InnovateFPGA | APJ | Platform

Competition Platform:
Terasic
DE10-Nano Kit


Specifications

Hard Processor System

Processor

Dual-core ARM* Cortex*-A9 MPCore
processor at 800 MHz

Neon™ media-processing engine with
double-precision floating point unit

32 KB L1 instruction cache

32 KB L1 data cache

512 KB shared L2 cache

Memory

64 KB on-chip SRAM

1 GB DDR3 SDRAM (32-bit data)

8 GB microSD* flash memory card

Processor I/O

1 gigabit ethernet PHY with RJ45 connector

1 USB 2.0 On-The-Go (OTG) port, USB Micro-AB connector

microSD* card interface and socket

Accelerometer (I2C interface plus interrupt)

UART to USB, USB Mini-B connector

Warm reset button, cold reset button

One user button and one user LED

Expansion header for use with Linear Technology* DC934A dual 16-bit digital-to-analog converter daughter card

Embedded software

Linux* kernel 4.1.33 LTSI

Angstrom 2016.12


Block Diagram

Board Block Diagram


System Block Diagram


Expansion Daughter Cards


  • 8-megapixel Camera
  • Support Focus Control
  • 2x20 GPIO with 3.3V I/O Standard

  • 240(H) x 320 (V) Pixel Resolution
  • Single Resistive Touch
  • 65K RGB color

  • Wifi and Bluetooth SPP
  • 9-axis Sensor with Accelerometer, Gyroscope, and Magnetometer
  • Humidity and Temperature Sensor, Ambient Light


Support Resources