This project intends to achieve heterogeneous acceleration of traffic sign classifier algorithms. The recognition of traffic signs is an important part of automatic driving. For traffic sign recognition algorithms, the accuracy of convolutional neural networks is in the forefront, but Existing neural networks and deep neural networks both rely on high-speed parallel computing equipment with high cost and high power consumption. Therefore, it is of practical significance to find a low-cost and alternative to high-cost GPU acceleration solution. FPGA acceleration is one of the choices.

Project Proposal

1. High-level project introduction and performance expectation

Now that the 5G era is approaching, autonomous driving has also ushered in its golden age of development. Recognizing traffic signs is an indispensable part of autonomous driving, and most of the existing recognition solutions are based on GPU or DPU platform convolutional neural networks. It has high cost and high power consumption. For FPGA acceleration solutions, its cost and power consumption are low, and it has more fine-grained parallelization and pipeline control, which can do bit-level and arbitrary data misalignment operations. These flexibility and finer-grained control at the bottom bring better computing efficiency, which will bring lower latency, higher energy efficiency and performance relative to the whole. This project is dedicated to using FPGA to achieve heterogeneous acceleration of traffic sign classifier algorithms.

2. Block Diagram

Firstly, a camera is used to collect the image, and then ARM+FPGA architecture is used to accelerate the convolutional neural network, which is used to classify the traffic signs in the image. Finally, the classification results are displayed on the screen.

3. Expected sustainability results, projected resource savings

This design mainly realizes the acceleration of CNN. The main performance parameters are the frame rate of image recognition and the overall power consumption, so as to achieve the purpose of increasing the frame rate while controlling the power consumption as much as possible. Besides, with the OpenVINO acceleration package provided by Intel, development efficiency and product performance can be greatly improved. As the core component of the entire control system, Intel FPGA has the advantages of high integration, low space occupation, and low power consumption. It can accelerate the convolutional neural network algorithm, so that the entire image processing has better real-time performance. It has more fine-grained parallelization and pipeline control, and can do bit-level, arbitrary data misalignment operations. These flexibility and lower-level fine-grained control bring better computing efficiency, which will bring better computing efficiency, lower latency and higher energy efficiency compared to the whole. This can greatly increase the speed of the algorithm and provide great possibilities for subsequent improvements. With its advantages of low power consumption, high performance and flexibility, Intel FPGA has gradually become an indispensable hardware part of deep learning.