Annual: 2018

AS033 »
Reconfigurable virtual instrumentation with FPGA
📁Digital Design
👤Miguel Risco-Castillo
 (Microelectronics Group, Digital Reconfigurable Devices)
📅Jul 15, 2018
Regional Final


👀 27968   💬 75

AS033 » Reconfigurable virtual instrumentation with FPGA

Description

This project presents the development of open source libraries, software tools, and firmware that can emulate the behavior of different conventional laboratory instruments using FPGA boards and a personal computer (PC), thus creating a multiple virtual instrument. The developed system allows the choice of instrument to be used without making a substantial change in the main hardware, the system has been designed in a modular way so that it is easily adaptable and customizable, the PC software and the hardware description language used to code the FPGA are easily extensible to add functionalities or applications.

Demo Video

  • URL: https://www.youtube.com/watch?v=xUa7MQW-RU8

  • Project Proposal

    1. High-level Project Description

    Introduction

    The development of experimental sciences and engineering benefits from the ability to obtain reliable data from controlled situations and process as measurements and comparisons. The tools that allow us to obtain this information are the instruments.

    An equipment that allows a measurement or acquisition of information for a specific experiment or work is a permanent requirement in research laboratories, conventional low-cost tools do not always allow adequate customization, and only the most expensive equipment allow programming, configuration or customization. Therefore often, the researchers of low resource centers do not have adequate tools and are in need of making themselves small application specific electronic systems. Most of the time, the hardware and software development for such kinds of devices are not shared and also not reusable. Virtual instruments are a good alternative because are cheaper than conventional instruments and also more flexible.

    With the exponential increment of the complexity of the reconfigurable logic devices, the Field Programmable Gate Array (FPGA) becomes an attractive element for build reconfigurable virtual instruments, because of the inherent flexibility.

    The new FPGAs integrates a hard processors system (HPS), and bring to the virtual instruments world the possibility of integrating all the components of the instruments in one compact device.

    Implementation of virtual instruments

    One of the main goals of this project is to build all the code (HDL and PC Software) in a modular way. The Simple Bus Architecture (SBA) allows us to use predefined intellectual property cores (IP Cores) in VHDL and interconnect them, also enabled us to reuse the code in all designs.

    The instruments, Oscilloscope, I-V Curve Tracer, Data logger and Arbitrary wave generator, described in this project can communicate with a PC or the HPS directly, using a high-speed serial interface, wireless using Bluetooth and some of the instruments support access to Ethernet network using an instrumentation server, that allows remote communication of the instruments through the local area network or Internet, with multiple remote software clients.

    The PC/HPS software has been developed using Lazarus, a cross-platform (Windows, Linux, OSX, etc.) integrated development environment (IDE) for rapid application development (RAD) based in Free Pascal.

    The main characteristics (specifications) of the instruments mainly depend on the analog frontend, for example, the limits in the sample rate of the ADC define the maximum bandwidth of the oscilloscope.

     

    2. Block Diagram

    Architecture Diagram

     

    Basic SBA System

    Basic SBA System


    Virtual Instruments Block Diagrams

     

    Wave Generator Block Diagram

    Wave Generator Block Diagram


    Curve Tracer Block Diagram


    Oscilloscope Block Diagram

     

     

    3. Intel FPGA virtues in Your Project

    The instrumentation hardware IP cores can be implemented on the DE10-Nano board (Fig. 9), some of the instruments GUI will be ported to the HPS. The bridge server, the piece of software, that converts the equipment in an instrumentation server and allows the remote connection through the network will be also implemented in the HPS.


    Fig. 9 - Basic block of the virtual instruments implemented in the DE10-Nano board.

    The use of the DE10-Nano board and the HPS-FPGA suppose greats advantages:

    Boost Performance

    • The inherent speed and parallelism of the FPGA allow us to connect a very fast ADC/DAC to increment the sample rate and capabilities of the instruments.
    • Is possible to run two instruments at the same time if they do not share analog resources.
    • The instruments GUI in the DE10-Nano could be running on Linux LXDE Desktop and using the HDMI port connected to a monitor.
    • The HPS/ARM could implement the Instrumentation Server directly on the DE10-Nano board, it allows the remote instruments GUI access.

    Adapt to Changes

    • The use of the FPGA allows the customization of the capabilities of the instruments, as new trigger modules for the oscilloscope or trace curves of the characteristics of special devices as solar cells.
    • Communities around this open development could increase the number of available instruments and improve them.
    • The researchers could take the developed IP-cores and instruments as a base for your own development and create customized projects.

    Expand I/O

    • Because of the high integration and large I/O of the DE10-Nano, the system could be compact and portable.
    • Because the already interfaces present on the DE10-Nano (HDMI, Ethernet), is possible develop a very compact and integrated instrument without a PC.
    • A range of specialized open hardware daughter boards could be developed with improved ADC/DAC and a small display to upgrade the DE10-Nano.

     

    4. Design Introduction

    The development of experimental sciences and engineering benefits from the ability to obtain reliable data from controlled situations and process as measurements and comparisons. The tools that allow us to obtain this information are the instruments.

    An equipment that allows a measurement or acquisition of information for a specific experiment or work is a permanent requirement in research laboratories, conventional low-cost tools do not always allow adequate customization, and only the most expensive equipment allow programming, configuration or customization. Therefore often, the researchers of low resource centers do not have adequate tools and are in need of making themselves small application specific electronic systems. Most of the time, the hardware and software development for such kinds of devices are not shared and also not reusable.

    The development of a custom instrument is a resource and time-consuming task, not only in the design and construction of those but in the development of firmware and support software, which is, often, a task of greater complexity distracting the researcher from real objectives. Virtual instruments are a good alternative because are cheaper than conventional instruments and also more flexible.

    The concept of virtual instrumentation is not new, the increase of availability and computational power of the personal computer (PC) and also the cost decrease of them, allow to move some aspects of the conventional instrument to the software on a PC. The interactivity and more complex data calculus of the instruments were migrated to the computer. That made possible, for low requirements, the use of generic or more basic hardware, and therefore cheaper.

    With the exponential increment of the complexity of the reconfigurable logic devices, the Field Programmable Gate Array (FPGA) becomes an attractive element for build reconfigurable virtual instruments, because of the inherent flexibility.

    The new development of FPGA devices provides mainstream high-performance processor hardware core embedded inside of the chip based on ARM cores, next to the fact of the more capable boards filled with interfaces and memory, allows installing an operating system as Linux and a desktop environment as LXDE.

    These new FPGA boards act as a basic computer system with reconfigurable hardware, an ideal platform for virtual instrumentation.

    For the development of the instruments described in this work, three main tools were used:

    The SBA System Creator (SBAcreator)

    Is a utility program that allows the easy creation of SBA system architecture and the access to a repository with open IP Cores. The SBAcreator, integrate an HDL editor and some tools to basic and easy verification of  HDL code. this tool takes care of the interconnection between the modules that are part of the SBA system. The SBA architecture was developed with the intention of aid the interchange and reuse of IP cores and HDL code.

     

    The Lazarus IDE

    Is a free integrated development environment for the rapid creation of cross-platform applications (RAD). It has a variety of components ready for use and a graphical form designer to easily create complex graphical user interfaces.

     

    Intel/Altera Quartus Prime, BSP, SDK tools 

    A complete software for the development, synthesis, analysis, and implementation of designs into the FPGA.

     

    5. Function Description

    This project allows implementing several virtual electronic instruments, using libraries an tools available in a free repository.

    Some of the instruments are:

    Virtual Oscilloscope

    This virtual instrument is intended to simulate the behavior of a basic traditional oscilloscope. Fig. 1 shows the basic block diagram of the oscilloscope. The main controller and the data acquisition are in the hardware, the graphical interface (Fig. 2) has been developed to emulate the control panel and the signals screen.


    Fig.1 - Oscilloscope block diagram


    Fig.2 - Oscilloscope GUI

    The data acquisition module generates the corresponding signals for controlling the analog to digital converter (ADC), the data is stored in the FPGA board memory and, then packaged to be sent to the PC in frames.

     

    I-V Curve Tracer

    This instrument enables to plot the current vs voltage characteristic curve and extracts some of the quantitative parameters of devices like Bipolar Transistors, Field-Effect Transistor (JFET), MOSFET Transistors, Diodes, etc. Fig. 3 shows the block diagram of this virtual instrument. The FPGA implements a system that can generate various voltage levels, where these levels are provided by the PC software. They are used to stimulate the object under study. The current values are recorded and then sent to the PC graphic user interface (GUI) (Fig. 4). 


    Fig. 3 - Block diagram of I-V curve tracer.

     
    Fig. 4 - Screenshot GUI of curve tracer with an NPN I vs V curves.

    The values generated by the digital to analog converter (DAC), have limitations on current and voltage, these cannot be connected directly and it is necessary an intermediate stage (output signal adapter) in order to generate higher voltages and currents to make the device characterization.

     

    Data Logger

    The Data Logger is an instrument that allows the records and storage of data over time, the sample rate is configurable and slower than the digital oscilloscope, but can storage a large quantity of data in a database file. Fig. 5 show the basic GUI of the Data Logger.


    Fig. 5 - Data Logger GUI

     

    Arbitrary Waveform Generator

    Also known as a function or signal generator, is a versatile instrument that allows generating a signal whose potential varies with time in a controlled and programmable way, that is to say, waves with frequency and configurable shapes. Fig. 6 shows the GUI designed for the waveform generator, which is able to create data values for simple functions, such as sawtooth, square, triangular, sinusoidal and arithmetic operations; and complex arbitrary signals, the interface is able to control the amplitude, vertical offset, and frequency of the signal.


    Fig. 6 - User Interface arbitrary wave generator.

    Fig. 7 and 8 shows an application that generates signals using images, a photograph of an oscilloscope’s display which is showing a signal of action potential of a real neuron, is processed automatically to extract data of amplitude values that will be used to fill the data table of waveform generator; after, the virtual instrument is able to reproduce the signal and also combine or make mathematical operations for test purposes. 
    The software supports other waveforms by programming plugins, so you can add new features to the program independently. Following a protocol, the system automatically recognizes the new feature set and places the button in the main interface.
     



    Fig. 7 and 8 - Generating a simulation of a neuronal action potential impulse from a real image of an oscilloscope.

    Because the sources (HDL and High level) will be available; the researchers, students, hobbyists, etc. can assemble their own instruments. Fig. 9 shows a custom instrument, made with wave generator and oscilloscope basic blocks. The user can generate a wave as an input for an external filter and then the signal coming from the filter, as input to the basic oscilloscope to review the results. Both (basic wave generator and oscilloscope are working at the same time).

    Custom Instrument
    Fig. 9 - Example of custom Instrument to test the effectiveness of filters.

    To implement these instruments on the DE10-Nano, we first have to set up the toolchain to compile the GUI of the instruments in Lazarus and prepare the cross compilers. That allows us to get the GUI's ready for transfer to the uSD card of the DE10-Nano. The Fig. 10 and 11 show the Instruments GUI's running on two different Linux distributions.

    Fig.10 - Instruments and the Instrumentation Server running in the  Ubuntu 16.04.1 LTS and Lxde desktop of the DE10-Nano

    Fig. 11 - Instruments and the Instrumentation Server running in the Angstrom GNU/Linux of the DE10-Nano

    The GUI's communicate with the Instruments implemented on the FPGA through a bridge server (Instrumentation server is the device that runs the bridge server, in this case, the DE10-Nano itself). The bridge server, see fig. 12,  gets the data from two different domains, it communicates with the FPGA hardware using a common and compatible interface as a high-speed serial port and communicates with the software through a network interface. A simplified diagram of the connectivity is in the Fig. 13.

    Fig. 12 - Bridge Server

     

    Fig. 13 - Simplified diagram of the instruments connectivity

    Because the instrument data is available to the network, any device attached to the local network can use it and run the instruments GUI. If an adequate port is forwarded by the router, the hardware instrument could be available to the Internet.

     

    6. Performance Parameters

    The final design must be capable of running the totality of a virtual instrument design, that includes:

    • The high-performance instrument hardware core implemented in the FPGA fabric.
    • The communication link between the  instrument core and the high-level GUI
    • The high-level GUI hosted on an operating system
    • Human interfaces for interact with the instruments (monitor, keyboard, mouse, etc.)
    • The bridge server that converts the equipment in an instrumentation server, allowing remote instrument GUI execution on others devices connected to the network.

    Previous works had separate hardware for each part of the virtual instrument, for example, the instrumentation core was implemented in an FPGA board. That board had a communication link with a PC where the GUI's were installed. The picture below shows that implementation:

    Now we have a very compact setup where is not necessary a computer. The DE10-Nano implement the Instrument core, the GUI interface, and the Instrumentation Server.

     

    7. Design Architecture

    MultiInstrument:

    Multiinstrument

    Fig. Block diagram of the architecture of the MultiInstrument.

     

    I-V Curve Tracer:

    Fig. Block diagram of the architecture of the I-V Curve Tracer Instrument.

    The curve tracer must generate different stimulus in order to obtain the I-V characteristics of the device under test (DUT).

    For example, to obtain an I versus V curve for a bipolar transistor, a signal in the form of a sawtooth is generated under control of the software on the PC/HPS. Then the data obtained is processed and graphed.

    The following figure shows the block diagram of the operation of the control system implemented in the FPGA of the instrument.

    PMODs Adapter board

    A PCB board was designed and built to connect the PMOD modules to the DE10-Nano.

     

     

     

     

     

     

     

     

     

     

       

    PMODs Modules

    Power Stage and Signals Adapter

    The values generated by the Digital to Analog Converter (DAC) have limitations in current and voltage, these cannot be directly connected to the DUT and an intermediate stage (Signals Adapter) is needed to generate the adequates voltages and currents, large enough for the characterization.

    The following figure shows the schematics of the signals adapter that allowed to achieving the requirements of the prototype.

    Implementation of the signals adapter

    3D visualization of the Power Stage and Signals Adapter for the I-V curve tracer

     

    Example of I-V Curve for the Transistor 2N2222 

    Some examples of curves of electronic devices obtained using the IV Curve Tracer.

    8. Instruments parameters and resource use summary.

    The IV Curve tracer was developed in more detail. It has a uniqueness of algorithm, HDL and software code to implement low resources and fast filters. We take data from several electronic components and we compare the results with reference instruments. Here are some of the data collected while the instrument was validated using a Sanwa CD771 multimeter. Some of the results and graphics are extensible to the others instruments that using the same analog frontend.

    Graphics and tables about of absolute and relative errors (DAC + Signal Adapter):

     

     

     

    For the validation of the IV Curve tracer, was used the Hameg HM6042, because this is a hybrid (analog/digital) instrument, the measurements were taken manually using the cursors.

    Below is a graphic comparing the output of the Hameg 6042 with the IV Curve Tracer.

     

     

    Resources utilization

    The multi-instrument, the wave generator and the oscilloscope, all share the same FPGA design, then have the same resources utilization. The below table, list the fitter summary:

    Logic utilization (in ALMs) 5,985 / 41,910 ( 14 % )
    Total registers 8777
    Total pins 180 / 314 ( 57 % )
    Total block memory bits 72,590 / 5,662,720 ( 1 % )
    Total RAM Blocks 20 / 553 ( 4 % )
    Total DSP Blocks 2 / 112 ( 2 % )
    Total PLLs 1 / 6 ( 17 % )
    Total DLLs 1 / 4 ( 25 % )

     

    For the curve tracer the table with the fitter summary is:

    Logic utilization (in ALMs) 5,183 / 41,910 ( 12 % )
    Total registers 8288
    Total pins 182 / 314 ( 58 % )
    Total block memory bits 62,366 / 5,662,720 ( 1 % )
    Total RAM Blocks 18 / 553 ( 3 % )
    Total DSP Blocks 0 / 112 ( 0 % )
    Total PLLs 1 / 6 ( 17 % )
    Total DLLs 1 / 4 ( 25 % )

     

    All instruments share the same HPS  configuration:

    Hard processor system peripheral utilization  
        -- Boot from FPGA 1 / 1 ( 100 % )
        -- Clock resets 1 / 1 ( 100 % )
        -- Cross trigger 0 / 1 ( 0 % )
        -- S2F AXI 1 / 1 ( 100 % )
        -- F2S AXI 1 / 1 ( 100 % )
        -- AXI Lightweight 1 / 1 ( 100 % )
        -- SDRAM 1 / 1 ( 100 % )
        -- Interrupts 1 / 1 ( 100 % )
        -- JTAG 0 / 1 ( 0 % )
        -- Loan I/O 0 / 1 ( 0 % )
        -- MPU event standby 0 / 1 ( 0 % )
        -- MPU general purpose 0 / 1 ( 0 % )
        -- STM event 1 / 1 ( 100 % )
        -- TPIU trace 1 / 1 ( 100 % )
        -- DMA 0 / 1 ( 0 % )
        -- CAN 0 / 2 ( 0 % )
        -- EMAC 1 / 2 ( 50 % )
        -- I2C 2 / 4 ( 50 % )
        -- NAND Flash 0 / 1 ( 0 % )
        -- QSPI 0 / 1 ( 0 % )
        -- SDMMC 1 / 1 ( 100 % )
        -- SPI Master 1 / 2 ( 50 % )
        -- SPI Slave 0 / 2 ( 0 % )
        -- UART 2 / 2 ( 100 % )
        -- USB 1 / 2 ( 50 % )

     

    9. Conclusions

    With this project, we want to give to the community the necessary FPGA IP cores and Software libraries to making their own instruments. There are no limits to the improvement of future development. At first, we develop the SBA architecture for our designs but then we found in it an inherent educative value, this project uses this architecture with that purpose. All the source code (HDL + Processor software) has been writing to make it modular and shareable. We design the basic instruments for help as a start point to custom development. We hope to help with the better understanding of the fundamental of electronic instrumentation and nothing is better than build our own instrument.

    The HDL IP cores and tools for the building of this kind of instruments can be found on our repositories:

    https://github.com/mriscoc/SBA/releases

    https://github.com/mriscoc/SBA-Library

    And soon we will be going to add the repository with all the demonstrative instruments.

    We found to the DE10-Nano one of the best boards for this project because of the balance between FPGA capabilities, CPU, interfaces and the cost. We suggest the building of some cheap daughter boards that can implement the electronics for basic instrumentation. Maybe with the same (ADC/DAC) converters included on the PMOD plus some frontend opams with analog multiplexers and using the Arduino connector or the 2x20 GPIO.



    75 Comments

    AS033 🗸
    About the comments from one of the Judges:

    "This project has good features and looks like a lot of effort has gone into to make this happen. However the choice of programming language, interfaces and architecture does not lend itself to be expendable and adaptable. Moreover, it is not clear how calibration to compensate errors and test to guage accuracy of this instrument. Also, This design does fully take advantage of the resources available in Intel FPGA. It uses the FPGA for interfacing with the ADC and DAC. The equivalent could be accomplished using just the mi microprocessor. Similar designs:
    1) https://www.redpitaya.com/
    2) https://www.youtube.com/watch?reload=9&v=7Br3L1B80ow "

    Our answer:

    For the development of the software for the HPS (ARM Processor), we use Lazarus, a multiplatform IDE based in a modern FreePascal (object-oriented) compiler. This language has a huge community of developers and also because it is multiplatform, the instruments developed can be compiled for several platforms almost unchanged the source code, that is essential because the network capabilities of our project, you can use the same instrument in a MAC, Windows, Linux, etc. also, you could use a RasberryPi to run the GUI. The Lazarus is Free and Open. For the architecture, we develop SBA, a near Wishbone implementation. There are a lot of cores developed using Wishbone interfaces, you can visit Opencores.org, Wishbone and SBA are Open and Free architectures. The above ensures that our project is fully expandable and adaptable. Because you have the control about the development of the software and hardware for your custom instrument, then you can choose how to make the calibration, we give the basic blocks to build your custom solutions based in our libraries and tools, is as a LEGO for make instruments. Of course, the FPGA is not only to interface the DAC and ADC, please review our block diagrams, there, we specified that the instrument core is in the FPGA, all the acquisition tasks, fast filters, buffers and others that are needed for instrumentation is there, that is the reason because the instruments can run in FPGA cards without processors with the help of an additional computer for the GUI (virtual instrumentation).
    We see very difficult to accomplish the goals of our project using only a microprocessor. All the modern virtual instrumentation platforms use FPGA.
    The project Red Pitaya that you cited needs a computer for running the GUI. With the DE10-Nano our project do not need for an additional computer. Also, they do not implement the "Bridge Server" that allows us the network connected remote GUI.
    Sorry but the second link is only a component tester.

    We believe that we fail to adequately explain the virtues of the project and how we did use it to teach the basics of modern electronic instrumentation. The most valuable contribution is not the instruments, the fundamentals contributions are the pieces that allow to the researchers, students, and hobbyists to develop their own instruments from a toolkit and try to integrate them in a community where they can share and reuse their development.

    Thank you.
    🕒 Jul 18, 2018 01:31 AM
    AS033 🗸
    We want to say thank you to Terasic and Intel for allowing us to be part of this interesting competition and all the people that supported us, with their vote and comments. 6183 visualizations, 73 comments, and 2277 votes (the top in the World) represent the interest of the community in our work. We will continue with the development and we publish the results on our web page: http://ue.accesus.com we wait for you there or in our fan page: https://www.facebook.com/microElectronica/

    Again, Thank you!
    🕒 Jul 16, 2018 12:46 PM
    Peter Athanas
    This is a wonderful and quite useful project. Job well done. This is how companies like National Instruments got started. Good decision in making this open source. I hope that you and the hobbyist community keeps this project alive.
    🕒 May 28, 2018 08:38 AM
    AS033🗸
    Thank you! We have the hope to contribute to the knowledge of modern instrumentation based in digital electronics and programmable/reconfigurable systems. We considered that this project can have educative value and to serve as a start point to the hobbyist.
    🕒 May 31, 2018 11:45 PM
    andres cicuttin
    This is an excellent project and the results presented so far are really impressive.
    The proposed global architecture and its modular characteristic allow full exploitation of the resources of these FPGA based systems-on-chip which, by the way, are very complex and not easy to deal with.
    By facilitating the implementation of novel and custom instrumentation, this project will surely expand the base of potential users and designers.
    Congratulations and good luck!
    🕒 May 04, 2018 03:25 AM
    AS033🗸
    Thank you. We hope to implement the basis for future development and provide the facilities for the understanding of the basic functionalities of modern instrumentation.
    🕒 May 13, 2018 02:44 AM
    Tariq Ziad Kanaan
    it is really good project,
    but how the oscilloscope can rescale the input signal ?
    i mean by hardware not virtually
    🕒 Apr 28, 2018 07:58 AM
    AS033🗸
    Depending on the instruments a Signals adapter board is necessary to adapt and scale the inputs and outputs to the values requires for the DAC and ADC.
    🕒 May 13, 2018 02:40 AM
    Tariq Ziad Kanaan
    awesome data acquisition system
    🕒 Apr 27, 2018 08:39 PM
    AS033🗸
    Thank you.
    🕒 May 13, 2018 02:38 AM
    Tariq Ziad Kanaan
    good luck
    🕒 Apr 27, 2018 08:37 PM
    AS033🗸
    Thank you
    🕒 May 13, 2018 02:37 AM
    Ariel Victor Flores Balderrama
    excellent project
    🕒 Feb 08, 2018 05:54 PM
    AS033🗸
    Thank you.
    🕒 May 13, 2018 02:37 AM
    AS033🗸
    Thank you.
    🕒 May 13, 2018 02:37 AM
    Yashwant Dagar
    It is a wonderful example of exploiting the reconfigurability. I like your Idea. What is the use of parallelization in your project?
    🕒 Jan 30, 2018 10:57 AM
    AS033🗸
    Thank you! There is an example of parallelization in the last custom instrument (Fig. 9) Where a basic wave generator and a basic oscilloscope are working at the same time. There is also parallelism in the IP-Cores management of the different i/O interfaces, data processing, and communication with the GUI.
    🕒 Jan 30, 2018 01:38 PM
    Ren Aifeng
    I like this project, and I wish you a good luck!
    🕒 Jan 30, 2018 09:12 AM
    AS033🗸
    Thank you! Your comments help us to make it better.
    🕒 Jan 30, 2018 01:25 PM
    Denis S. Loubach
    Interesting and useful project.
    Which types of reconfiguration are you considering: runtime, partial, full?
    🕒 Jan 29, 2018 10:03 AM
    AS033🗸
    Thank you. We know that partial reconfiguration could be the final goal, but any form of partial reconfiguration requires the paid version of Quartus. Because we want to reach as many people as possible we decide to use free and/or open tools.
    🕒 Jan 29, 2018 12:11 PM
    Jenbere Meskerem Waktola
    This is a good project.
    Thank you very much.
    🕒 Jan 29, 2018 05:51 AM
    AS033🗸
    Thank you!
    🕒 Jan 29, 2018 11:29 AM
    Slavisa Jovanovic
    Very interesting project! It could be a starting point for all enthusiasts aiming to do electronics
    🕒 Jan 29, 2018 04:37 AM
    AS033🗸
    Thank you! We want to give to the community a set of tools to speed up their developments.
    🕒 Jan 29, 2018 12:08 PM
    JUAN CARLOS LUCAS CORDOVA
    Its interesting .
    🕒 Jan 24, 2018 04:08 AM
    AS033🗸
    Thank you!
    🕒 Jan 24, 2018 09:21 AM
    Volodymyr Petrushak
    Do you use standard measurement methods or do you use any innovative solutions?
    🕒 Jan 23, 2018 03:16 AM
    AS033🗸
    Thank you. Each instrument has his own characteristic method of measurements, for example, we implement some filter technics and oversampling. We provide high-level code libraries, IP-Cores code, already made base instruments to use or build newer over them. There are no limits!
    🕒 Jan 23, 2018 08:00 AM
    Volodymyr Petrushak
    Most oscilloscopes use a parallel ADC. What type of ADC are you using?
    🕒 Jan 23, 2018 01:50 PM
    AS033🗸
    The specifications mainly depend on the characteristics of the analog frontend. Because the project adaptability is possible to use several analog frontend boards according to the use of the instruments.
    🕒 Jan 23, 2018 02:01 PM
    Ren Aifeng
    I like this project, and it will be more perfect if you can give the specifications of this virtual instrumentation.
    🕒 Jan 16, 2018 08:02 AM
    AS033🗸
    Thank you. The specifications mainly depend on the characteristics of the analog frontend. Because the project adaptability is possible to use several analog frontend boards according to the use of the instruments.
    🕒 Jan 16, 2018 02:52 PM
    MOHAMED
    I hope you have a look to this project in Machine learning and vote for it.
    http://www.innovatefpga.com/cgi-bin/innovate/teams.pl?Id=EM105
    🕒 Jan 27, 2018 01:21 AM
    Mandy Lei
    The detailed introduction gives us a clear understanding of your design.Very excellent work!
    🕒 Jan 16, 2018 01:26 AM
    AS033🗸
    Thank you!
    🕒 Jan 16, 2018 02:45 AM
    Chen, Yun Chao
    A practical and useful design
    🕒 Jan 15, 2018 09:10 PM
    AS033🗸
    Thank you. We have the hope to start in the future a community where everybody can get and share instruments code.
    🕒 Jan 16, 2018 02:44 AM
    MOHAMED
    I hope you have a look to this project in Machine learning and vote for it.
    http://www.innovatefpga.com/cgi-bin/innovate/teams.pl?Id=EM105
    🕒 Jan 27, 2018 01:22 AM
    Kevin Pintong
    This is an extremely useful project for ECE majors. I like the fact that it has networking capability. What are the accepted ranges for input signals?
    🕒 Jan 13, 2018 12:51 PM
    AS033🗸
    Thank you! The ranges are mainly defined by the analog frontend (ADC/DAC antialiasing filters, etc.). The HDL and Software will be user customizable and parameterizable to allow different hardware frontend.
    🕒 Jan 13, 2018 11:44 PM
    MOHAMED
    I hope you have a look to this project in Machine learning and vote for it.
    http://www.innovatefpga.com/cgi-bin/innovate/teams.pl?Id=EM105
    🕒 Jan 27, 2018 01:22 AM
    MOHAMED
    Good work. Keep improving.
    🕒 Jan 12, 2018 03:50 PM
    AS033🗸
    Thank you. Your comments help us to make it better.
    🕒 Jan 12, 2018 04:39 PM
    Ignacio Santiago Husain
    Nice project! How the interfaces to different devices will be? A couple of BNC connectors like an oscilloscope to connect several probes?
    🕒 Jan 12, 2018 12:59 PM
    AS033🗸
    The mainboard will be the DE10-Nano FPGA board and a daughter board with the analog frontend will have the adequate connectors according to the instrument.
    🕒 Jan 12, 2018 04:39 PM
    Juan Cangahuala
    Very Interest Project. Do you have any plans to bring the project as part of the curricula to the Universities in Peru or any other countries?
    🕒 Jan 12, 2018 11:46 AM
    AS033🗸
    Thank you. InnovateFPGA could publish all the code (HDL and High level) in Github if our project is selected. All the source code was made thinking about its educative value and can be used freely for curricula.
    🕒 Jan 12, 2018 04:32 PM
    Daniil Smirnov
    Very interesting project!
    Will it have some calibration operations?
    It can be also expanded to other applications like this projects:
    http://www.innovatefpga.com/cgi-bin/innovate/teams.pl?Id=EM043
    http://www.innovatefpga.com/cgi-bin/innovate/teams.pl?Id=EM078
    🕒 Jan 12, 2018 05:22 AM
    AS033🗸
    Thank you! Calibration operations will perfectly possible. The total access to the sources (HDL and High level) allows customize the instruments and create new ones.
    🕒 Jan 12, 2018 04:27 PM
    andres cicuttin
    An excellent project well beyond Arduino or Raspberry Pi based instruments.
    Congratulations!
    🕒 Jan 08, 2018 09:52 AM
    AS033🗸
    Thank you! We expect to take advantage of the ARM on the HPS, for the high level functions and use the speed and parallelism of the FPGA for the acquisition and early data processing.
    🕒 Jan 09, 2018 05:59 PM
    Martín Espinoza
    About the remote connection, How many clients can connect to the instrumentation server at the same time? It is possible to access the instrument from the Internet?
    🕒 Jan 08, 2018 02:26 AM
    AS033🗸
    Actually, the FPGA connects to a PC, that PC implements the instrumentation server, you can execute the instrument GUI locally on this PC or in a remote TCP-IP connected client PC. Each GUI connection is registered on the server. The instrument data is then sent to all registered GUI. How many clients can connect is limited to a maximum of 254 but real limit depends of the resources of the instrumentation server and network infrastructure. Because the protocols and method of connection is perfectly possible connect the instrument with a GUI through the Internet if the server have an accessible public IP and the adequate open ports. When the instrumentation server will be migrated to the HPS, is expected to have a reduction in the amount of the possible connections.
    🕒 Jan 09, 2018 05:51 PM
    We successfully implement the instrumentation server in the HPS of the DE10-Nano, the PC is now optional and the instruments can be executed directly on the OS of the HPS. Also, you can execute the instruments GUI on remote PC's (Windows, Linux, Mac, etc.) and connect to the DE10-Nano.
    🕒 Jul 02, 2018 12:05 AM
    AS033 🗸
    Please don't forget vote for us!
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    🕒 Jan 07, 2018 05:29 PM
    Kasun Sameera Mannatunga
    I really like this project. Very useful for educators. Excellent work...!
    🕒 Jan 07, 2018 01:27 AM
    AS033🗸
    Thank you! We start this project thinking about education.
    🕒 Jan 07, 2018 05:26 PM
    Marlon Robleto Aleman
    Interesting Project.

    Success!!
    🕒 Jan 05, 2018 04:08 PM
    AS033🗸
    Thank you!
    🕒 Jan 05, 2018 06:49 PM
    Sergii Dykyi
    Do you plan to add a LCD screen? This will allow to realize the mode of operation of the device without connecting to a PC or monitor.
    🕒 Jan 04, 2018 04:23 PM
    AS033🗸
    It is possible to add a LCD screen as the Terasic MTL2 and also the Terasic LT24 with a reduced GUI. In the future It could get a daughter board with the analog frontend and a LCD screen for get similar functionalities to the DS212 oscilloscope.
    🕒 Jan 04, 2018 05:41 PM
    Pierre Cardenas
    Interesting project.
    Successes
    🕒 Jan 04, 2018 08:23 AM
    AS033🗸
    Thanks!
    🕒 Jan 04, 2018 12:45 PM
    Sebastián Paniagua
    An excellent project, congrats!
    🕒 Jan 04, 2018 06:44 AM
    AS033🗸
    Thanks!
    🕒 Jan 04, 2018 12:46 PM
    Leonardo Enrique Castillo
    Excellent, this project have future
    🕒 Jan 04, 2018 06:26 AM
    AS033🗸
    Thank you!
    🕒 Jan 04, 2018 12:47 PM
    David Alvarado
    What is the maximun sample rate of the oscilloscope?
    🕒 Jan 04, 2018 01:27 AM
    AS033🗸
    It depends of the ADC converter, The ADC of the DE10-Nano, LTC2308, can have a maximum sampling rate of 500ksps. Thank you for your comments.
    🕒 Jan 04, 2018 01:33 AM
    AS033🗸
    Maybe, in the future, we could have a daughter board to configure something similar to the ADC-SoC, but based on DE10-Nano.
    🕒 Jan 04, 2018 06:18 PM
    Julio Sevilla
    Interesting project. Are the GUI's only for windows?
    🕒 Jan 04, 2018 01:19 AM
    AS033🗸
    No, the GUI's can be compiled for all the platforms supported by Free Pascal and the LCL of Lazarus project: Windows, Linux, OSX, etc. Thank you for your comments.
    🕒 Jan 04, 2018 01:23 AM
    José Carlos Rodriguez
    Great Proyect
    🕒 Jan 03, 2018 10:47 AM
    AS033🗸
    Thanks!
    🕒 Jan 04, 2018 01:20 AM