📁Internet of Things
(Igor Sikorsky Kyiv Polytechnic Institute)
📅Jul 15, 2018
In this project we propose to create hardware accelerator for IOTA cryptocurrency transactions. IOTA allows making secure and authenticated quantum resistant channels between IoT devices for communication and micropayments with no fees. Hardware acceleration will allow to reduce transaction time and increase network throughput. FPGA implementation will be flexible enough to adapt for evolving standards, algorithmic methods, or security threats of young IOTA technology. As a result of the project we plan to run hardware accelerated IOTA node on Intel FPGA DE10-Nano board.
📁High Performance Computing
(Ain Shams University, and American College of the Middle East)
📅Jul 15, 2018
Who doesn’t dream of a new FPGA family that can provide embedded hard neurons in its silicon architecture fabric instead of the conventional DSP and multiplier blocks? The optimized hard neuron design will allow all the software and hardware designers to create or test different deep learning network architectures, especially the convolutional neural networks (CNN), more easily and faster in comparing to any previous FPGA family in the market nowadays. The revolutionary idea about this project is to open the gate of creativity for a precise-tailored new generation of FPGA families that can solve the problems of wasting logic resources and/or unneeded buses width as in the conventional DSP blocks nowadays.
The project focusing on the anchor point of the any deep learning architecture, which is to design an optimized high-speed neuron block which should replace the conventional DSP blocks to avoid the drawbacks that designers face while trying to fit the CNN architecture design to it. The design of the proposed neuron also takes the parallelism operation concept as it’s primary keystone, beside the minimization of logic elements usage to construct the proposed neuron cell. The targeted neuron design resource usage is not to exceeds 500 ALM and the expected maximum operating frequency of 834.03 MHz for each neuron.
In this project, ultra-fast, adaptive, and parallel modules are designed as soft blocks using VHDL code such as parallel Multipliers-Accumulators (MACs), RELU activation function that will contribute to open a new horizon for all the FPGA designers to build their own Convolutional Neural Networks (CNN). We couldn’t stop imagining INTEL ALTERA to lead the market by converting the proposed designed CNN block and to be a part of their new FPGA architecture fabrics in a separated new Logic Family so soon.
The users of such proposed CNN blocks will be amazed from the high-speed operation per seconds that it can provide to them while they are trying to design their own CNN architectures. For instance, and according to the first coding trial, the initial speed of just one MAC unit can reach 3.5 Giga Operations per Second (GOPS) and has the ability to multiply up to 4 different inputs beside a common weight value, which will lead to a revolution in the FPGA capabilities for adopting the era of deep learning algorithms especially if we take in our consideration that also the blocks can work in parallel mode which can lead to increasing the data throughput of the proposed project to about 16 Tera Operations per Second (TOPS).
Finally, we believe that this proposed CNN block for FPGA is just the first step that will leave no areas for competitions with the conventional CPUs and GPUs due to the massive speed that it can provide and its flexible scalability that it can be achieved from the parallelism concept of operation of such FPGA-based CNN blocks.
📅Jul 14, 2018
We are aimed at making a device for shooting real-time HDR (High Dynamic Range) video using FPGA. Our idea is to simultaneously use two image sensors with different exposure. FPGA receives streams from cameras, uses mathematical algorithms to combine them and transmit HDR video by HDMI.
FPGA enable you to make this process more efficient than CPU thanks to implementation of both the parallel architecture and pipelines.
📁Internet of Things
(Istituto Tecnico Tecnologico "G. Giorgi" - Brindisi - Italy)
📅Jul 08, 2018
Renewable energy is unstable and unpredictable. A little bit more predictable are human needs of electrical energy. Small communities sometimes have private wind/solar plants and fast varying energy requirements that could be fed (so avoiding to get, and pay, energy from the local distributor) if only a precise and fast management system would be available.
Our idea starts by considering a small community, up to 100-200 houses, where each one may have (or not) a private small solar/wind plant with or without local energy storage. A small public renewable plant may also be available.
Houses will share a power distribution network and will be connected to each other via a PLC (Power Line Communication) protocol. A power meter connected to a local management system (i.e. a DE10-nano board) will equip each house. A local sensor will measure instant power consumption (and production if applicable), calculate and update local power needs trends and manage a fast switching system in order to decide the best quantity of produced energy to store/use locally and to pump into the network. The same system will ask others the exact quantity of energy required locally and, if possible, acknowledge all requests received.
There will not be a central management system, all procedures will be shared by local controllers, by communicating to each other instant power surplus/requirements in order to minimize the total amount of energy got from local distributor.
Data collected about net energy amount flowed in/out every house will be used to build a periodical balance so each producer/consumer will pay for the surplus energy got only.
Power requirements/production can vary in less than one second, so each local controller should be able to activate its switch as fast as the overall situation will require. A fast data communication and processing is then required.
(Addis Ababa University)
📅Jul 07, 2018
By using computer vision and the principles of machine learning, this smart guidance system aims to help partially or wholly blind people to self-navigate through sidewalks, cross streets and move with freedom and confidence inside and outside of their homes without being assisted by other people.
The image captured by the camera will be fed to the control system that is based on the FPGA for processing and decision making. The decision made by the system is used to genarate signal to control hand wrist bands(right and left) which are connected to the system via bluetooth. The hand wrist bands use the generated signal from the system to vibrate at different intensity levels, patterns and durations so that the user can follow the vibrations accordingly.
📁Other: Reconfigurable Computing
(University of Perugia)
📅Jul 07, 2018
The BondMachine: a fully reconfigurable computing ecosystem
The aim of the BondMachine (BM) project is to implement a computing system to enable a real and full exploitation of the underlying hardware. This is a key to the success in the Hera of hybrid computing. In order to achieve this objective the BM has been designed to create a heterogeneous and flexible architecture on top of FPGAs. Moreover the overall vision is based on a reduction of the number of hardware/software layers which by product guarantee a simplest software development. As such the BM project has been thought as a complete reconfigurable computing ecosystem, that starting from a high-level description creates both the hardware and the software that runs on it.
The two architectural pillars are computing elements (processors) and non-computing elements (for example memories, channels, barriers). The latter are meant to be shared among processors. Finally thanks to a custom network protocol many BondMachines can be interconnected together, therefore building heterogeneous multi-core systems or even cluster of multi-cores.
The flexibility of the BM makes possible the implementation of any computing system ranging from networks of small agents, like IoT (Internet of Things), to high performance devices for ML (Machine Learning) or real time data analysis, and even systems that mix all this different characteristics together.
The BM can interact with standard Linux workstations both as a special purpose hardware accelerator or as part of a computer/BM hybrid clusters. As a final and important remark we want to stress that, regardless of the scenario considered, the hardware/software generation always starts from a high level description of the problem.
📁Other: Augmented Reality, Optoelectronics, Medical Applications
(Universitat Autonoma de Barcelona)
📅Jul 02, 2018
The main goal of this proposal is to establish a working Augmented Reality application with a basic, but complete and platform independent, communication network. The proposed system uses an FPGA, ARM Linux, accelerometer/gyroscope, and DLP; to implement a medical application demo that shows a bone fracture over the human skin.
📅Jun 29, 2018
Epileptic patients suffer from seizure periods that occur to their brain not allowing them to lead a normal life. In this project we are employing machine learning for the detection of the neural brain signals and sending back an electric stimuli to recover the brain to its normal state treating the seizure.
The EEG signal is fed to the FPGA and the training of the Support Vector Machine (SVM) takes place to classify between seizure and non-seizure periods. Hence, triggering an electric stimuli whenever the seizure is detected to treat the seizure.
📁High Performance Computing
(Saint-Petersburg National Research University of Information Technologies, Mechanics and Optics)
📅Jun 03, 2018
String searching or pattern matching - one of the oldest challenges in programming. String searching is a main tool in solving some very important problems, such as words autocompletion and intrusion detection systems. But common (CPU based) approaches sometimes are not efficient enough in solving string search tasks.
Proposed approach is hardware accelerator - special hardware IP-cores that is designed to perform pattern matching for big set of pattern in any data flow, such as network traffic or data from any storage.
Our goal is to design hardware accelerator for string searching, that will be:
* Efficient - perform searching in up to 10 Gb/s data flow;
* Flexible - suitable for both searching in network packet flow and in any other data sources;
* Easy to use and modify - our proposal is to make 2 step search engine inside hardware - "fast" one (base on Bloom filter) for approximate search and “slow” one (base on Aho-Corasick algorithm). “Slow” part will be made by high-level synthesis, and can be easily changed for any other algorithm.
📅Apr 30, 2018
The goal of this project is to create a robot that will keep your pet entertained while you are gone. Our robot will be able to satisfy a large panel of market demand thanks to its useful capacity to adapt to different situations. The robot comes with a pair of wheels built into the device which will allow it’s users to set it to roll around the house and complete a series of different tasks. It’s main functions will the search, the pick up and the return of small objects. Your pet will always find something to do and play with in your absence. The users will also be able to communicate and visualize their favourite animal thanks to a smartphone android application that will connect to the robot and access its built-in speaker and live-streaming camera. Owners will have the choice of recording videos and taking pictures or snaps and directly share them from the application on the internet. At the end of a whole day of play, our intelligent robot finds its way back to its charging station. Along the way, it uses its various sensors to detect nearby objects and avoid collision.
📅May 31, 2018
Vector network analyzers (VNA) are widely used for parameter measurements of active and passive electronic devices and also some properties of materials. VNA is a device, which enable the RF performance, and some other devices to be characterized in terms of network scattering parameters, or S-parameters. Each S-parameter has an amplitude-frequency and phase-frequency characteristics, which are very useful for estimation of device quality. VNA is based on reflectometer: output signal and its reflection from other outputs should be splitted, then some signal processing operations and displaying the result for users. Signal processing is consist of different non-trivial mathematical operations: convolution, the Fourier transform, math operations in complex numbers etc. Another important problem is achievement well-tuning sync between source and sink. Such requirements push us to use SoC FPGA as an optimal platform for realization of handmade VNA.
(Igor Sikorsky Kyiv Polytechnic Institute)
📅May 31, 2018
Motor control module by position.
This module is designed to control the DC motor by position. The field of application is high-precision electric drives. The task is to provide precise control and stopping of the engine at a given position of the motor rotor. The field of application is automotive (in particular electric vehicles), precise positioning systems.