👤Naufal Ridho Hizamiar
(Bandung Institute of Technology, Indonesia)
📅May 24, 2018
COLORIZER is a proposed image colorization system that is specifically designed for FPGA. Image colorization itself is a process of adding color to grayscale image. Using COLORIZER, we let the system to colorize the photo automatically by mapping a grayscale image (1-channel pixel) to a colorized output image (3-channel RGB pixel). The COLORIZER system uses deep learning approach, Artificial Neural Network (ANN), to recognize patterns in an image so image colorization can be automated. Training process is usually done very slow using single-threaded CPU because of its very heavy computational load. The computation, which involves bulk of simple multiplications and accumulations, actually has a lot of parallelism. Thus, we need to 'parallelize' the computation and find a method to compensate its resource-consuming system. We implement the COLORIZER system using FPGA and also applies Sliding Window Technique. Take note that the neural networks is fully implemented within the FPGA, meaning that the FPGA is not only used as a hardware accelerator. Also by applying Sliding Window Technique to the system we only need 3 output perceptrons rather than the number of all image pixels (3 perceptrons to represent Red, Green Blue channel). Furthermore, with this technique we can create many training sets only from one image. Sliding Window Technique is actually a widely used technique in object detection. But, we see opportunity that this technique can be used 'hand-in-hand' with ANN to implement image colorization on FPGA.
📅May 21, 2018
Embedded Neural Coprocessor is the next generation of embedded processor which have capability to execute machine learning functions efficiently. Our Coprocessor supports small scale convolution neural networks(CNN) computation natively using re-configurable layers which will be implemented in programmable logics of Cyclone V. First, user designs the neural network using provided API, then train it offshore (servers) and feed the model to our Coprocessor. Then it can execute feed forward computation and generate output which will be used in targeted application eg real-time object recognition, face recognition, voice command recognition etc. we have separate dedicated hardware logic to emulate each type of layers which are computational intensive operations like convolution/ Fire layer, Maxpool layer. For example, if a network have convolution layer operation, it have dedicated hardware which perform the convolution layer function. Layer parameters (dimension, inputs, etc) are configurable dynamically according to requirement. Similarly we have configurable Maxpool hardware module. We support most commonly used layer operations, But if user required different operation, which also supported by performing computation in ARM processor. Layers are connected through memory after each layer output stored in memory.
Our Coprocessor can achieve great speed compare to typical sequential embedded processor since we are using hardware level parallelization. It can be used in many real-time applications. It will be cost effective compare to GPU or other dedicated hardware level acceleration. We separate device used for training (in servers) and testing application (Coprocessor), because training is very time consuming process which need heavy computing power while testing can be done remotely. Ultimately we could able to run small scale neural network on embedded device with greater speed.
(Velammal College of Engineering and Technology)
📅May 11, 2018
The jasminum flower is classified depending on their quality by extracting colour, shape, texture of the flower using various techniques and performing tensor flow algorithm for machine learning process.
1. Currently, flowers are classified manually based on their quality, which is a time consuming process so that the flowers lose their freshness.
2. Accuracy of classification is poor.
The following are the existing difficulties, which could be altered by automation proposed in this project.
The system should be designed in such a way that there must a sample collector where the jasminum flower is collected directly from the farm. The flower is allowed to pass on a conveyor belt. When it enters the image capturing chamber, the image of the flower is captured and given to the microcontroller of raspberry pi then the image is subjected for feature extraction. The colour, shape, texture of the flower could be identified using the following algorithms: Colour and Edge Diversity Descriptor (CEDD), Hue Saturation Value (HSV) colour space, Linear Binary Pattern (LBP), Zernike moments. The extracted features are fed as inputs to the tensor flow. The tensor flow is open source software by Google where the machine learning and deep learning is performed. The concept of machine learning became easy after the occurrence of tensor flow which has in-build support for deep learning, tools to assemble neural networks, mathematical functions for neural networks. Once the output is generated, it is received by the microcontroller and opens the switch for the following category via switch controller. The flower that is moving on a conveyor belt falls into the box of its category since the switch was open. Thus, the flowers could be classified accordingly. The light intensity controller is used to control the intensity or brightness while capturing the image in the image capturing chamber. The multiplexer switch and the light intensity controller could be programmed in FPGA board DE10 which could be efficient.
Thus, the jasminum flower is segregated according to its quality with great accuracy using this methodology. Machine learning made the life of people easier and comfortable.
📁Other: Combine of Image Processing, High Performance Computing and Digital Design.
👤Taufik Ibnu Salim
(TIU of Instrumentation Development)
📅May 11, 2018
Spatial Digital Image Correlation (DIC) was used to measure the bubble rising terminal velocity to obtain the bubble size distribution generated by a mixing pump. This method provides a non-contact and low-cost measurement of bubble size. The digital image correlation setup is designed using low-cost line laser-diode as a light source, and a consumer pocket digital camera to record the light scattered from the rising bubble inside the chamber. The measured terminal velocity distribution is proportional to the square radius of the microbubble according to the Hadamard Rybczynski equation. DIC analysis of multiple interrogation windows was performed to obtain the bubble velocity distribution. Therefore the bubble size distribution can be estimated by calculating the radius from the Hadamard-Rybczynski equation. Evaluation of multiple frame pairs over time was performed to see the effect of the size distribution of the bubble radius.
📁Other: Orientation Estimation
(Universitas Gadjah Mada)
📅May 10, 2018
We proposed an Attitude and Heading Reference Systems (AHRS) coprocessor from
tri-axis Magnetic, Angular Rate, and Gravity (MARG) and Inertial measurement Unit (IMU) sensor using Madgwick’s
AHRS sensor fusion algorithm. By relieving processor-intensive tasks from the
primary processor, coprocessors can accelerate overall system performance.
📅May 07, 2018
In WSN (Wireless Sensor Nodes) among all the communications radio communication releases highest energy consumption for on-the-node computation. Their energy is supplied from batteries and these nodes trade the data communication for on the node processing. Currently, they is designed around off-the-shelf low-power micro controllers. But by utilizing a more similar processing element, the energy consumed by the processing element can be significantly reduced. This idea shows the design of the newly proposed architecture i.e. folded tree architecture for data processing through on the node in wireless sensor networks, using parallel prefix operations. When compared to traditional modern micro controllers in sensor nodes the measurement of silicon implementation improves 10-20x of energy.
📁High Performance Computing
📅May 07, 2018
We plan to use the FPGA to perform real time identification and localisation of moving objects in the field of view of a SONAR based sensor platform mounted on a vehicle to alert drivers of near-by wildlife.
In active mode, the SONAR system will use a single speaker (transmitter) to generate a series of specific sound waves.
Reflections from these sound waves will then be recorded using an array of 64 individual microphones (receivers).
The sampled data from the microphones will be processed through a combination of time-delay beamforming and correlation with the transmitted waveform.
The result of the correlated waveforms will also be fed through a Fast Fourier Transform to provide a Doppler result, allowing detection of any moving objects and their relative velocities.
These will be fed to a Neural Network trained to identify wildlife responses.
Configuration and Communication with the SONAR platform will be performed through use of the HPS and the Ethernet port, allowing the sensor to forward warnings to the driver of the vehicle.
📁Other: COMBINATION OF I.O.T , HPC ,MACHINE LEARNING
(GUJARAT TECHNOLOGICAL UNIVERSITY)
📅May 04, 2018
THE PROBLEM FACED BY MANY OF THE PEOPLE IN POSITIONING/MOVING HEAVY EQUIPMENT IN DIFFERENT TERRAINS (ESPECIALLY STAIRS AS NOTICED), SO USING MECH. DESIGN, IOT AND MACHINE LEARNING ONE SOLUTION IS TRIED.
👤Lakshmi Renuka M
(National Institute of Technology, Tiruchirapalli)
📅May 03, 2018
Fatalities and injuries resulting from road traffic accidents are a major and growing public health problem in India. As per the Report, ‘Road Accidents in India -2016’, there have been 4,80,652 accidents, 1,50,785 deaths and 4,94,624 injuries. In Every Hour 55 accidents take place and 17 Persons killed on Indian Roads. Over 137,000 people were killed in road accidents in 2013 alone, which is more than the number of people killed in all our wars put together. This shows how alarming road safety issue is in India. There’s one death every 4 minute in India due to Road accidents and drunken driving is one of the leading causes of road fatalities. There is a need to apply wellness being applied to the driving experience and engineered into the vehicle. This has driven the society for driver monitoring Systems. If integrated into the driving experience, this wellness-inspired systems can improve the driver’s situational awareness; reduce impairment from fatigue, stress, and distraction; and thereby improve driver performance and overall highway safety.
Driver monitoring system currently exists in high end personal vehicles, however many of the systems are not up to the mark i.e. they don’t sense sufficient data to estimate driver’s state accurately. Secondly, they uses expensive GPU based platform to implement Deep Learning/vision algorithm.GPU Based systems are expensive & Have a significant impact on overall cost of vehicle.In middle class society like India,most of the cars are low and mid price ranged & incorporating a GPU based systems have huge impact of vehicle's overall cost, which automobile companies can't afford.
FPGAs (field programmable gate arrays) are well suited for highly deterministic and parallel image processing algorithms due to the inherent parallel nature. Recent Research has show that FPGA can outperform GPUs in terms of performance & performance for dedicated tasks such as Deep Learning and Vision algorithm with lower cost.
Our Aim in this project is to develop a low cost Driver Monitoring/Assistance System for low and medium end vehicles with equivalent/better performance as compare to existing systems.
📁High Performance Computing
📅May 02, 2018
Adders are most important part in a processor working as they are present in ALU unit and perform all arithmetic and logical operations . The faster the adders involving the faster the results we get , As we are indeed trying to get faster and high end results in today technology . we are need of the fastest adders to make faster computations.
In this project , we are using a Brent kung adder and Binary excess converter( B E C) in a carry select adder instead of the regular use of ripple carry adders it is the Existing method . By replacing ripple carry adders and placing Brent kung adder along with binary excess converter , we tend to get faster results. As the carry propagation and generation time has reduced from ripple carry adder to Brent kung adder as it is parallel prefix adder works like a tree based and Binary excess converter on other hand will add 1 to the result making the faster computation . So with the use of Brent kung adder and Binary excess converter we get faster computational environment. In future we are intending to use more faster approach of adders involving use of high end addition techniques like vedic maths or use of other faster computational methods. Finally , Our method not only makes computation faster but also consumes less power as it uses less number of logics than existing results in lower power consumption and these can be implemented in FPGA.
📁Other: Virtual/Augmented Reality (VR/AR)
👤Kwang Liang Chong
(Universiti Tunku Abdul Rahman (UTAR))
📅Apr 30, 2018
Virtual/Augmented reality (VR/AR) is a fascinating way to travel using nothing more than the power of technology. With a headset and motion tracking, VR/AR lets you look around a virtual space as if you are actually there. It is also been a promising technology for decades that never truly caught on.
Position tracking and depth sensing to measure user head motion and surrounding condition are very important towards achieving immersion and presence in virtual reality. In VR/AR, performance is extremely important as every milliseconds counts.
In our project, we are proposing on FPGA based Kalman Filter in analyzing IMU data for position tracking as well as stereo camera for depth sensing. IMU sensor data which consists of noise and interfaces are inaccurate in position tracking and hence require filtering. Kalman filter is an algorithm which requires complex matrix calculation where high-speed arithmetic function implementations and pipelining can be achieve by using FPGA based fully hardware Kalman Filter. Stereo vision depth processing pipeline will be processed in FPGA, outputting dense depth map. Then, object detection and tracking will run on integrated ARM processor based on dense depth map generated by FPGA. Depth sensing on FPGA consume lesser power while having higher performance compared to digital signal processor.
Low power consumption and small package size of FPGA allows realization of battery-powered cordless headset to maximize user experience.
📁High Performance Computing
(Bharati Vidyapeeth College Of Engineering)
📅Apr 30, 2018
In this modern world the problem of loneliness in the old age is quite very common and critical for the society in every aspect. According to the Demographic Research about ‘Living alone: One-person households’ which states that the 30% of the total population are living alone and this has been increasing by the time. It was 19% in 2000 and there is the increase in the older women to live alone from the past. There could be many reasons for someone to live alone and surely it is a difficult task for oneself. And this arouses the person to go in a state of loneliness. This might causes the problem of lack of companionship, falling into an unsafe environment, inability to complete their errands, remembering their medication, their personal details, etc.
The proposed system will communicate virtually with his/her house and the user by taking the real time data and status. Then identifying the needs of the user, status of their health and take the necessary actions in favor of the user.