Deadline to register is Jun 30, 2019.
Teams can still edit your proposals during judging period.

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Regional Final
Community Award
📁Machine Learning
👤Abarajithan Gnaneswaran (University of Moratuwa)
📅Jul 11, 2019
Traffic congestion is a widespread problem that results in the loss of billions of dollars annually, valuable time of citizens and in some cases: invaluable human lives. By utilizing our custom designed CNN accelerator, we propose an edge-computing solution for this problem, that is both cost-effective and scalable. For developing countries like Sri Lanka, our vision-based traffic control on FPGA would be an ideal solution as described below.

In most countries, traffic flow is controlled by traffic lights with pre-set timers. In Sri Lanka, this often causes congestion during peak hours as the system is not sensitive to the traffic levels in each lane of an intersection. To solve this, the traffic policemen usually turn off the lights and manually control the traffic during peak hours. However, the policemen are unable to visually judge the level of traffic in each lane from their vantage point close to the ground.

An automated solution to this problem would be vision-based traffic sensing. However, the neural networks that excel in machine vision tasks require powerful GPUs or dedicated hardware. Laying cables along the road to transmit video feeds to control centers would require expensive infrastructure which is infeasible for a developing country like Sri Lanka.

Therefore, we present an implementation of a traffic sensing algorithm that is based on Object Detection on FPGA as a cost-effective, scalable, edge solution. We use YOLOv2, a state-of-the-art CNN for object detection accelerated through our custom CNN accelerator with post processing done on the ARM processor.

Custom CNN Accelerator Design:

A unique aspect of our project is, we design and implement a brand-new highly parallelized CNN accelerator whose single core at 100 Mhz can run a 384 x 384 RGB image through YOLOv2: (a 23-layer state-of-the-art object detection CNN with 2 billion floating point multiplications, 6 million comparisons, 8 billion additions) within 0.2 seconds. Multiple such cores can be implemented in parallel / series inside an FPGA to further improve throughput. The architecture can also be used to accelerate several other neural networks with slight modifications.
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630
votes

👀 1830   💬 165
Regional Final
📁Machine Learning
👤Raul Valencia (University of Auckland)
📅Jul 09, 2019
With the explosive interest in the utilization of Neural Networks (NN), several approaches have taken place to make them faster, more accurate or power efficient; one technique used to simplify inference models is the utilization of binary representations for weights, activations, inputs and/or outputs. This competition entry will present a novel approach to train from scratch Binary Neural Networks (BNN) using neuroevolution as its base technique (gradient descent free) executed on Intel FPGA platforms to achieve better results than general purpose GPUs

Traditional NN uses different variants of gradient descent to train fixed topologies, as an extension to that optimization technique, BNN research has focused on the application of such algorithms to discrete environments, with weights and/or activations represented by binary values (-1,1). It has been identified by the authors that the most frequent obstacle of the approach taken by multiple BNN publications to date is the utilization of gradient descent, given that the procedure was originally designed to deal with continuous values, not with discrete spaces. Even when it has been shown that precision reduction (Float32 -> Float16 -> Int16) can train NN at a comparable precision [1], the problem resides in the adaptation of a method originally designed for continuous contexts into a different set of values that create instabilities at time of training.

In order to tackle that problem, it is imperative to take a completely different approach to how BNNs are trained, which is the main proposition of this project, in which we expose a new methodology to obtain neural networks that use binary values in weights, activations, operations and is completely gradient free; which brings us to the brief summary of the capabilities of this implementation:

• Use weights and activations as unsigned short int values (16 bits)
• Use only logic operations (AND, XOR, OR...), no need of Arithmetic Logic Units (ALU)
• Calculate distance between individuals with hamming distance
• Use evolutionary algorithms to drive the space search and network topology updates.

These substantial changes simplify the computing architecture needed to execute the algorithm, which match natively with the Logic Units in the FPGA, but also allows us to design processing elements that effectively adapt to the problem to be solved, while at the same time, remain power efficient in terms of the units needed to deploy because agents with un-optimized structures would automatically be disregarded.

The algorithm proposed, Binary SUNA (SUNA [2] with binary extensions ), will be used to solve standard reinforcement learning challenges, which are going to be connected to an FPGA to solve them more efficiently, given that the architecture will match the evolved network at multiple stages, specially during training and inference. Comparison of the performance gains between CPU, GPU and FPGA will be demonstrated.

[1] Michaela Blott et al. 2018. FINN-R: An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks. ACM Trans. Reconfigurable Technology
[2] Danilo Vargas et al. 2017. Spectrum-Diverse Neuroevolution With Unified Neural Models. IEEE Transactions on Neural Networks and Learning Systems 28
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43
votes

👀 334   💬 1
Regional Final
📁Machine Learning
👤Christopher Moran (Now Why Would You Do That)
📅Jun 28, 2019
This project intends to create a working prototype of an add-on solution for motor vehicles (including motor cycles) to actively detect pedestrian movements and warn of potential collision hazards.
The solution will project information onto a heads-up display to minimise distraction to the driver.
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43
votes

👀 281   💬 4
Regional Final
📁Digital Design
👤Parikshit Saha (Independent Researcher)
📅Jun 26, 2019
Effect of Diabetes on the eye is known as Diabetic Retinopathy which may lead to blindness in its furthermost stage. Highly skilled Doctors or Ophthalmologists use to inspect the patient's eye to detect the affectedness of this disease. But the amount of well-trained doctors is very less compare to drastically increasing amounts of patients. So proper treatment is nearly impossible. Plus also founding doctors in the remote locations is rarely possible. This Diabetic Retinopathy comes with no early symptoms. Only regular eye-checking need to be done to diagnosis it's starting affectedness. So we have planned to make an engineering-based solution making a standalone system which will do the primary diagnosis of the eye & suggest the patient the immediate precaution they need to take.
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55
votes

👀 607   💬 15
Regional Final
📁Other: Computer Vision
👤Gurmeet Singh (RIEIT Punjab-144533, India)
📅Jul 05, 2019
In the recent past, the wave to bring the true driverless cars (automation level-5) to the reality has led the great advancements in the various technologies like lidar, radar, machine learning, robotics, artificial intelligence and semiconductor. Though still in the nascent phase, the driverless cars seem promising to eliminate the accidents associated with the human error and there is still a great implementation and marketing scope at the level -0 of automation where most of the driver’s functions are carried out by the human beings. Especially in the countries where the road infrastructure is not very easy to be followed by today’s driverless cars. Among these human errors, the driver's drowsiness and fatigue is the most common cause of road accidents worldwide. In this project, we are addressing this issue by bringing a driver assistant system as an add-on solution for the billions of today's on road cars.

In this contest, we are proposing the compact, efficient and standalone FPGA based hardware implementation of our research work published as:

https://www.ijcaonline.org/archives/volume181/number25/rajneesh-2018-ijca-918055.pdf
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56
votes

👀 565   💬 16
Regional Final
📁Machine Learning
👤Masayuki Shimoda (Tokyo Institute of Technology)
📅Jun 27, 2019
This project presents an accurate, fast, and energy-efficient object detector with a thermal camera on an FPGA for surveillance systems. A thermal camera outputs pixel values which represent heat (temperature), and the output is gray-scale images. Since the thermal cameras do not depend on whether there is the light or not unlike other visible range cameras, object detection using the thermal camera is reliable without dependence on the ambient surrounding. Additionally, for a surveillance system, visible images are not suitable since they potentially violate user privacy. Thus, this topic is of a broad interest in object surveillance and action recognition. However, since it is challenging to extract informative features from the thermal images, the implementation challenges of the object detector with high accuracy remain. In recent works, convolutional neural networks (CNNs) outperform conventional techniques, and a variety of object detectors based on the CNNs have been proposed. The representative networks are single-shot detectors that consist of one CNN and infer locations and classes simultaneously (e.g., SSD and YOLOv2). Although the primary advantage of the type is that it enables to train detection and classification simultaneously, the resulting increased computation time and area requirements can cause problems of implementation on an FPGA. Also, as for the proposed networks on RGB three channel images, one of the problems is false positive; the realization of a more reliable object detector is required. This project demonstrates an FPGA implementation of such reliable YOLOv2-based object detector that meets high accuracy and real-time processing requirements with high energy-efficiency. We explore the best preprocessing among conventional ones for the YOLOv2 to extract more informative features. Also, well-known model compression techniques, both quantization and weight pruning are applied to our model without significant accuracy degradation, and thereby the reliable model can be implemented on an FPGA.
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41
votes

👀 363   💬 2
Regional Final
📁Machine Learning
👤Corey Lammie (James Cook University)
📅Jun 18, 2019
Deep Neural Networks (DNNs) have recently achieved remarkable performance in a myriad of applications, ranging from image recognition to language processing. Training such networks on Graphics Processing Units (GPUs) currently offers unmatched levels of performance; however, GPUs are subject to large power requirements. With recent advancements in High Level Synthesis (HLS) techniques, new methods for accelerating deep networks using Field Programmable Gate Arrays (FPGAs) are emerging. FPGA-based DNNs present substantial advantages in energy efficiency over conventional CPU- and GPU-accelerated networks. Using the Intel FPGA Software Development Kit (SDK) for OpenCL development environment, networks described using the high-level OpenCL framework can be accelerated targeting heterogeneous platforms including CPUs, GPUs, and FPGAs. These networks, if properly customized on GPUs and FPGAs, can be ideal candidates for learning and inference in resource-constrained portable devices such as robots and the Internet of Things (IoT) edge devices, where power is limited and performance is critical. Here, we propose a project using a novel FPGA-accelerated deterministically binarized DNN, tailored toward weed species classification for robotic weed control. We intend to train and benchmark our network using our publicly available weed species dataset, named DeepWeedsX, which includes close to 18,000 weed images. This project acts as a significant step toward enabling deep inference and learning on IoT edge devices, and smart portable machines such as an agricultural robot, which is the target application of this project.
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5
votes

👀 164   💬 1
Regional Final
📁Machine Learning
👤Youki Sada (Tokyo Institute of Technology)
📅Jun 30, 2019
This project is an FPGA implementation of the accurate monocular depth estimator with realtime. The monocular depth estimation estimates the depth from single RGB images. Estimating depth is important to understand the scene and it improves the performance of 3D object detections and semantic segmentations. Also, there is many applications requiring depth estimation such as robotics, 3D modeling and driving automation systems. The monocular depth estimation is extremely effective in these applications where the stereo images, optical flow, or point clouds cannot be used. Moreover, there is the possibility to replace an expensive radar sensor into the general RGB camera.

We choose the CNN (Convolutional Neural Network)-based monocular depth estimation since the stereo monocular estimation requires larger resource and CNN schemes are able to realize accurate and dense estimation. Estimating the depth from 2D images is easy for human but it is difficult to implement accurate system under limited device resources. Because CNN schemes require massive amount of multiplications. To handle this, we adapt 4 and 8-bit quantizations for the CNN and weight pruning for the FPGA implementation.

Our CNN-based estimation is demonstrated on OpenVINO Starter Kit and Jetson-TX2 GPU board to compare the performance, inference speed and energy efficiency.
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2
votes

👀 260   💬 5
Regional Final
📁High Performance Computing
👤TZE KIAN OOI (Universiti Teknologi Malaysia)
📅Jun 29, 2019
Heart disease is known as the top silent killer of the world. The ratio of patients to cardiologists is not balanced especially in developing countries. This lead to heavy workload to the existing cardiologists. Advance ECG equipment are mostly found in urban's hospitals. Hence, long travel time and queuing time are needed for heart monitoring especially for rural community. Current ECG devices lack state-of-the-art classifications and primarily used in ECG signal delineation. All these factors indirectly lead to increasing public mortality due to cardiovascular diseases (CVD).

To solve the increasing mortality, this project presents a smart heart monitoring device which able to support real-time self-classification of few life-threatening arrhythmia such as premature atrial contraction (PAC), premature ventricular contractions (PVC), left bundle branch block (LBBB), right bundle branch block (RBBB), ventricular tachycardia (VTach) and atrial fibrillation (AFib) for layman home user to enable frequent monitoring of the heart conditions. This device is an enhancement of previous in-house design by deploying SoC-FPGA technology on DE10 nano FPGA development platform, as well as developing a complete system equips with Internet-of-Thing (IoT) features. The complete system comprised of three main components, which are DE10 nano kit, Android-based mobile app, and Google Firebase technology. The DE10 nano kit combined with Olimex ECG shield will acquire single lead electrocardiograph (ECG) as input analog biosignal, perform analog to digital conversion, ECG signal preprocessing, features extraction and machine learning classification to detect multiple life-threatening arrhythmia using hardware/software co-design technique. The raw ECG signal and classification result will transmit from DE10 nano kit to Android-based mobile application through Bluetooth wireless communication for real-time ECG graph plotting and classification result display. The mobile phone will then upload the data to Google firebase server to give access to professional clinician for further validation and medical actions for early prevention of heart disease. The system functionality verification and computation timing performance evaluation are carried out using Fluke ProSim3 vital sign simulator and LeCroy HDO6104 mixed-signal oscilloscope.
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17
votes

👀 224   💬 4
Regional Final
📁Machine Learning
👤SHIVANSHU SRIVASTAVA (University of Allahabad, Prayagraj, India)
📅Jun 30, 2019
There has been a long history of studying Altered States of consciousness(ASC) to better understand the phenomenological properties of conscious visual perception. ASC can be defined as the qualitative alternation in the overall pattern of mental functioning such that experiencer feels that their consciousness being very different from the normal. One of the qualitative properties of ASC is visual hallucination (Tart C. T.,1972).
Hallucination Machine(HM) is a combination of Virtual Reality and Machine learning developed by Keisuke Suzuki and his team at Sackler Centre for Consciousness Science, University of Sussex, United Kingdom. This can be used to isolate and simulate one specific aspect of psychedelic phenomenology i.e. visual hallucination. HM uses panoramic videos modified by Deep Dream algorithm and are presented through Virtual Reality head set with head tracking facility allowing to view videos in naturalistic manner. The immersive nature of the paradigm, the close correspondence in representational levels between layers of Deep Convolutional Neural Network(DCNN) and the primate visual hierarchy along with the informal similarities between DCNN and biological visual systems, together suggest that the Hallucination Machine is capable of simulating biologically plausible and ecologically valid visual hallucinations (Keisuke et al. 2017).
Deep Dream is the algorithm developed by Mordvintsev, Tyka (2015) et al. at Google. When an input image is fed into a neural network using Deep Dream algorithm, and the user chooses a layer, the network enhances whatever it detects at the user defined layer. For example, if we choose higher level layer, complex features or even whole images tends to appear. So if a cloud in an image looks like a bird, neural network will make it look more like a bird and enhancement of the bird image in the output image will depend on the number of iterations computed for.
Due to the physiological effects of psychedelic drugs which are known to induce ASC, scientific community is in need of some alternative tool to study consciousness. Study done by Keisuke et al.(2017) provides no information whether the Hallucination Machine can be used to study the neural underpinnings behind the conscious perception of emotional visual processing. It is still a very hot topic in scientific community whether there is any role of top-down signalling or predictive processing theories of perception (Bayesian Inference) in the formation of perceptual content. We even don’t have any clear answers regarding whether the emotional visual processing is a late or early process.
So to answer these questions our team is developing a DCNN using Deep Dream and Deep Dream Anim algorithms and it will be trained on large data set of emotional images prepared by Dr. Narayanan Srinivasan at CBCS, University of Allahabad, India. Then test images will be evaluated by tweaking the lower and higher level layers, number of iterations and other parameters. Based on the analysis of results the above mentioned questions can be answered.
So, it will be an exploratory research to decipher the science of conscious perception that can be used in advancement of vision science and technologies around it.
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1
votes

👀 146   💬 2
Regional Final
📁Digital Design
👤Longyu Ma (The University of Auckland)
📅Jun 29, 2019
In recent decades, error correction codes have been found to be not only capable of correcting received data conveyed via a communication channel, but also enhance the robustness of biometric systems, like iris recognition systems. The basic idea of error-correcting biometric information derives from an analogy between a communication channel and a biometric channel. To be more specific, as every capture of a certain slice of biometric information cannot be 100% identical, the received information in the first time or enrollment phase can be denoted as original data in a “sender” and the information captured in other time except the first time or verification phase can be denoted as received data in a “receiver”. Through a virtual communication, data in the “receiver’s side” is contaminated by noise that leads to the data difference in both sides. Enough differences between the enrolled and to-be-verified biometric may fail to fulfill the threshold for matching.
Our project aims to deploy an iris recognition system with an FPGA-friendly Forward Error Correction scheme that helps to increase the acceptance rate. Taking advantage of this Intel DE-10 board, the traditional image processing will be handled by HPS and FPGA part will be responsible for the error correction. Such collaboration can eliminate the penalty caused by the additional error correction to the maximum extent.
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2
votes

👀 120   💬 0
Regional Final
📁Machine Learning
👤Narayan Raval D (LD college of engineering)
📅Jul 01, 2019
Lie detection is an evolving subject. Polygraph techniques is the most trending so far,but a physical contact has to be maintained.The project proposes the lie detection by extracting facial expressions using image processing. The captured images to be analyzed is broken into facial parts like eyes, eyebrows,nose etc. Each facial parts is then studied to determine various emotions like eyebrows raised and pulled together,raised upper eyelids,lips stretched horizontally back to ears signifies fear while eyebrows down and together, narrowing of the lip shows anger. All the emotions can be aggregated to determine wheather a person is lying or not. The interrogation video or live video is broke down into various facial images of the particular individual. Different emotions from the various images is collected and processed with the general face reading criteria to evaluate his truthfullness.
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415
votes

👀 665   💬 75

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